This invention relates to the comparison of programmable logic device (PLD) configurations. More particularly, this invention relates to such comparisons for assuring functional equivalence between configurations of different types of PLDs.
Programmable logic devices are well-known. Early programmable logic devices were one-time configurable. For example, configuration may have been achieved by “blowing”—i.e., opening—fusible links. Alternatively, the configuration may have been stored in a programmable read-only memory. These devices generally provided the user with the ability to configure the devices for “sum-of-products” (or “P-TERM”) logic operations. Later, such programmable logic devices incorporating erasable programmable read-only memory (EPROM) for configuration became available, allowing the devices to be reconfigured.
Still later, programmable logic devices incorporating static random access memory (SRAM) elements for configuration became available. These devices, which also can be reconfigured, store their configuration in a nonvolatile memory such as an EPROM, from which the configuration is loaded into the SRAM elements each time that the device is powered up. These devices generally provide the user with the ability to configure the devices for look-up table-type logic operations. At some point, such devices began to be provided with embedded blocks of random access memory that could be configured by the user to act as random access memory, read-only memory, or logic (such as P-TERM logic).
In all of the foregoing programmable logic devices, both the logic functions of particular logic elements in the device, and the interconnect for routing of signals between the logic elements, were programmable. More recently, mask-programmable logic devices (MPLDs) have been provided. With mask-programmable logic devices, instead of selling all users the same device, the manufacturer manufactures a partial device with a standardized arrangement of logic elements whose functions are not programmable by the user, and which lacks any routing or interconnect resources.
The user provides the manufacturer of the mask-programmable logic device with the specifications of a desired device, which may be the configuration file for programming a comparable conventional programmable logic device. More recently, software has become available that allows direct creation of a configuration file for the mask-programmable logic device. In any event, the manufacturer uses that information to add metallization layers to the partial device described above. Those additional layers program the logic elements by making certain connections within those elements, and also add interconnect routing between the logic elements. Mask-programmable logic devices can also be provided with embedded random access memory blocks, as described above in connection with conventional programmable logic devices. In such mask-programmable logic devices, if the embedded memory is configured as read-only memory or P-TERM logic, that configuration also is accomplished using the additional metallization layers.
Although with the simplest early programmable logic devices, it may have been possible to lay out a logic design by hand, it has been traditional to use software tools provided by the programmable logic device manufacturer or by third parties to program programmable logic devices. Contemporary programmable logic devices have become so complex that programming a device without such software tools is at best impractical.
The number of different programmable logic devices has proliferated. A single manufacturer might provide several different types of devices, and within a type several families of devices, and within a family several devices of different sizes having more or fewer features. A user may want to incorporate different programmable logic devices into different products or uses, but perform similar functions. Thus, a manufacturer of cellular telephones may provide telephone models of different prices and feature complexity. Among the components of such telephones may be programmed programmable logic devices. The telephone manufacturer's different models, having different prices, may incorporate different models of programmable logic devices that reflect the prices and features sets of the telephones. Nevertheless, for certain features, the telephone manufacturer may have proven certain programmable logic device programming and would like to use that programming in all of its telephones to the extent possible.
There may be other reasons why a user would want to use different versions of the same programming. For example, a user may have a working design for a particular programmable logic device, but may prototype additional features in a test program for the same programmable logic device. Once that test program has been proven, the user will want to migrate those features into the existing design. Or the user might want to optimize settings of the programming tool, without making any actual logical changes, to see if the programming tool can be made to provide a more efficient programming file.
Alternatively, a user may want to copy a design from a more complex programmable logic device into a smaller programmable logic device of the same family, to use, e.g., in a less expensive version of the same product. Or the user may want to migrate the design to a completely different programmable logic device family. For example, for cost reduction, the user may want to shift some of its production into mask-programmable devices. Certain mask-programmable devices are virtually identical to the conventional programmable logic devices to which they correspond, while others, such as that described in commonly-assigned U.S. patent application Ser. No. 10/316,237, filed Dec. 9, 2002 and now U.S. Pat. No. 6,988,258, which is hereby incorporated herein by reference in its entirety, includes a plurality of more elementary logic areas that can be connected together to provide the functionality of a corresponding conventional programmable logic device. Either way, there will be differences (fewer or more, respectively) between the programming for a conventional programmable logic device and a corresponding mask-programmable logic device.
The user programming for each of these devices may be entered by the user in one or both of (a) a file, such as a hardware description language file, describing the logical behavior of the device, and (b) a file of settings for the programming tool. The combination of one or both of those files may be referred to as a “user configuration dataset.” Commonly-assigned U.S. patent application Ser. No. 11/108,370, filed Apr. 18, 2005, now U.S. Pat. No. 7,277,902, which is hereby incorporated by reference in its entirety, describes the comparison of different user configuration datasets for a device, resulting in the presentation to the user of a representation of any differences between the user configuration datasets. The user also may be presented with suggestions for resolving any differences between the different user configuration datasets.
However, even if differences between the user configuration datasets are resolved, the actual programming of the devices is accomplished by compiling those user configuration datasets into configuration files, which may be embodied as a bitstream or database reflecting a netlist of elements. While it is known to compare different configuration files by comparing (“verifying”) those netlists, known comparison techniques may not be sufficient.
For example, programmable logic devices frequently include embedded blocks that are preconfigured for certain functions such as memory, phase-locked loops, etc., whose characteristics are programmed by configuration bits. Known formal verification techniques treat those preconfigured blocks as blocks, with no regard to how they are implemented, even though differences internal to such blocks may have significance. Similarly, formal verification techniques do not account for placement differences that may have significance, or to electrical differences, such as drive strength differences, that may have significance. These differences are exacerbated when comparing different classes of programmable logic device, such as comparing a field programmable gate array to an equivalent mask-programmable logic device.
It would be desirable to be able to make a functional comparison between the programming of different programmable logic devices.